Technically speaking, IC has not been confirmed on PS5 and there's nothing preventing that confirmation at this point since NDAs around IC are gone. There's a chance PS5 has a customized L3$ but it's not 128 MBs worth, not even close, because the die is not big enough.
Also considering the average CU is 62% larger than the ones in PS4 (as Cerny said at Road to PS5; Series X's CUs are also similarly larger, there could be some slight margin of error difference in CU sizes between the two however), that eats into more of the silicon budget. And the die size, again, it's only between 309 mm^2 to 320 mm^2; up to 100 mm^2 of that removed for IC doesn't leave a lot of room for the GPU, memory controllers, CPU, etc. Especially considering that the consoles are likely on 7nm DUV, which doesn't bring any density improvements over 7nm.
There's a lot of things pointing to why they don't have IC as in the way AMD's listed it. But, could they have a feature maybe present in IC (cache scrubbers?) implemented in whatever amount of L3$ (anything between 4 MB to 5 MB most likely, but probably the former) they have on their GPU, giving it some of the functionality of IC? Yes, that's possible.
But again, nothing's been confirmed.
If it's not on the die then it's not IC. If it's off-die then the bandwidth for that cache drops significantly, and it limits your options. Also the interconnect for that off-die cache to the rest of the APU would likely be limited, and getting any data into that off-chip cache still would require accessing the GDDR6 memory pool and moving it through the GPU caches to then dump into the off-chip cache.
There's feeling something, and then there's looking at it from a more level-headed perspective. From what we've seen of the physical board design in numerous teardowns, there's nothing appearing like an off-chip cache next to the APU, and the chip on the flash memory controller is very likely just the SRAM (possibly could be PS-RAM) cache for the storage, not an IC-like cache for the GPU.