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[Bitmap Frogs]

I will definitely pass that on to the rest of the team.

Don't we have a thunderdome thread?

Of course it doesn't get much traffic because the entire forum is now the thunderdome.

 

[SlimySnake]

Do you think it would be possible to create a console war thread where anything goes? My thought would be alot of that type of behavior would be channeled there and somewhat keep it out of these threads. Just a suggestion.

I will definitely pass that on to the rest of the team.

but we already have that. it's called the next gen speculation thread. ;p

 

[BlueXImpulse]

The delta of xsx being better in all multiplats.

Nice cop-out.

 

[Jaguar Victory]

In less than 3 months I'll have this beast under the TV. Can't wait! Next gen is going to be so great with some great quality of life upgrades like low loading and improved framerates. I'm curious to see how the RayTracing shakes out and to see if we get a cool VR solution down the road. The system is more than capable of delivering a great VR experience.

 

[ZywyPL]

How come XB Hot Chips thread ended up being (yet another) thread about the PS5? Just report the usual PSSD5 circlejerk clowns and move along.

 

[Marlenus]

It can, because we do know that RDNA2 is 7nm+RT, all other features are optional.
CDNA cards won't have them, for example, still RDNA2-based.

CDNA is based on GCN and Vega because that uarch is a monster for compute workloads.

 

[Jaguar Victory]

CDNA is based on GCN and Vega because that uarch is a monster for compute workloads.

I wonder if anyone on the XBOX team could tell us more about best tested case uses of their ML upscaling tech. I think it's going to be great for BC and am looking forward to that. I wonder if it will have some real cool DLSS type use cases.

 

[AphexTwunt]

This was a solid thread at the start before warriors

Denizens of the speculation thread can't resist a positive Xbox thread.

 

[Marlenus]

I wonder if anyone on the XBOX team could tell us more about best tested case uses of their ML upscaling tech. I think it's going to be great for BC and am looking forward to that. I wonder if it will have some real cool DLSS type use cases.

I think it is one of those features where the team probably have some ideas of how it could be used but some dev will.come along with a great idea and do something wildly imaginative with it that they didn't think of.

It does make leela zero and leela chess zero portable to the console so if you want to get your ass kicked at go/chess by your Xbox that could be fun.

 

[Team Andromeda]

What a super powerful console, next-gen for either MS or SONY fans is going to be great and I simply can't wait

 

[chilichote]

But the thing you’re assuming is that it makes a difference or that people care. It running at that clock speed all the time isn’t a bad thing. In fact it’s a good thing because it’s one less thing the developers have to worry about.

They don't have to worry about. They put code into the machine and the machine uses the clock that's needed for the code.

 

[MrMiyagi]

But it doesn't, we already know that's a lowball figure.

First of all bandwidth is a huge differentiator especially when it comes to rendering performance. It's the reason the Xbox One X was running games on average at resolutions 70-80% higher than the PlayStation 4 Pro while only having a 43% more capable GPU. With the PlayStation 5 and Series X we're again met with a large divergence in memory bandwidth afforded to the GPU.

Secondly there's what I said in relation to frequency not closing the gap with CU's, it's just a fact of reality that it does not. Lesser CU count overclocked to reach the stated teraflop figure of a like minded GPU with more CU's at lower frequency results in the obvious workflow advantage of the higher CU count GPU. Bear in mind this is with a GPU hitting the same teraflop target, with the Series X and the PlayStation 5 there is a 1.875 teraflop disparity so it's plain to see how that pans out when extrapolated.

Third we come down to the architectures, the cat is out of the bag for the PlayStation 5 in terms of being a hybrid GPU implementation, this means the GPU will come with the benefits of 7nm RDNA architectural efficiencies. For the Series X it's quite clearly an RDNA 2 GPU given its specifications, with that comes the efficiency uplift of being natively of that architecture and 7nm+. What that uplift is has yet to be revealed but it's not going to be 0% which would widen the gap further.

Fourth we come to the variability factor of the PlayStation 5, its frequency is not fixed, it deviates based upon the power budget of what it's processing/rendering. That "18%" is based upon the PlayStation 5 when at peak boost frequency, but we all know that's not going to be the case especially in rendering heavy games where power demands spike dramatically.

So at the end of the day that 18% is not actually 18%, it is left to be seen what it actually averages out to but it's going to be a decent and substantive margin above that.

Series X obviously has the better GPU. Imo this can only mean 2 things. Sony cheaped out a bit and the ps5 will be at least $100 cheaper. Or.. Sony is convinced their SSD tech will be a bigger game changer than a better gpu.

Both consoles have their strengths in different areas and it will be up to 3rd party developers which strengths they will focus on more. Typically that means the console that has the biggest installbase...

We'll see but I got a feeling Sony's 1st party games will stand out a lot compared to MS's exclusives, though. With the whole power narrative, MS isn't doing Series X any favors by shackling it to current gen, potato PCs and a 4Tflops Series S for the remainder of the console generation.

 

[TBiddy]

Series X obviously has the better GPU. Imo this can only mean 2 things. Sony cheaped out a bit and the ps5 will be at least $100 cheaper. Or.. Sony is convinced their SSD tech will be a bigger game changer than a better gpu.

Both consoles have their strengths in different areas and it will be up to 3rd party developers which strengths they will focus on more. Typically that means the console that has the biggest installbase...

We'll see but I got a feeling Sony's 1st party games will stand out a lot compared to MS's exclusives, though. With the whole power narrative, MS isn't doing Series X any favors by shackling it to current gen, potato PCs and a 4Tflops Series S for the remainder of the console generation.

It won't be "shackled" to current gen for the entire generation. Why does this narrative keep getting repeated by Sony fans?

 

[psorcerer]

CDNA is based on GCN and Vega because that uarch is a monster for compute workloads.

AFAIK GCN occupancy is still a problem, even for compute loads.
2x narrower RDNA is a way to go, but maybe I'm mistaken.

 

[Redlight]

It won't be "shackled" to current gen for the entire generation. Why does this narrative keep getting repeated by Sony fans?

It's helps to justify the purchase of the weaker console.

It's conveniently forgotten that both consoles will have cross-gen games, that only MS first party are mandated to support the Xbox One and that it's only for a couple of years, so will only impact a relative handful of games in reality.

Did I say forgotten? Sorry, I meant deliberately ignored for FUD purposes.

 

[Redlight]

18% isn't "significant" imo

If you and your co-worker did the exact same job at the exact same skill and effort level and yet they were paid 18% more than you, would you consider that to be 'significant'?

I/O advantages? I think we're not going to see that much difference tbh The delta between Pro and X was even higher and well...

...and well, the One X is noticeably better than the pro for third-party games, you know, the vast majority of games.

 

[Sleepwalker]

Every. Damn. Time

 

[MrMiyagi]

It won't be "shackled" to current gen for the entire generation. Why does this narrative keep getting repeated by Sony fans?

I meant, shackled to Jaguar cpu and HDD for the first two years, and shackled to the 4Tflops Series S for the remainder of the console generation.

Series X is great piece of kit, no arguing that. It's more Microsoft's corporate strategy for next gen that stops Series X from tapping into that amazing hardware and generate some next gen excitement.

 

[Redlight]

It's not that what Matt implied. Like Jason Ronald said, if they went with variable clocks, XSX would have more FLOPS. Matt implied to that. XSX would have more FLOPS

Yes, but without smart-shift boosting the PS5 would be weaker. You're treating it like it's a feature when I suspect that Sony are, understandably, selling the positive features of what was really a necessity.

Without boosts the PS5 wouldn't by anywhere close to competitive in the hardware stakes.

The Series X doesn't have Smartshift because it simply doesn't need it.

 

[Redlight]

I meant, shackled to Jaguar cpu and HDD for the first two years, and shackled to the 4Tflops Series S for the remainder of the console generation.

Series X is great piece of kit, no arguing that. It's more Microsoft's corporate strategy for next gen that stops Series X from tapping into that next gen excitement.

Your point about the Jaguar cpu and HDD have been addressed multiple times in this thread already. It's nonsense.

As for the Series S, my understanding is that it's designed to play next-gen games just at lower framerates/resolutions. That's it. It still has a vastly improved GPU/CPU compared to current gen. It still has an SSD.

Nothing will be shackled by that. You need to let go of this narrative.

 

[PaintTinJr]

Possibly? If they are relying on hardware BC I assume they will need to keep this level of functionality and ensure the PS5 can provide it. I'm wondering if they will have a software solution for allowing the GPU to snoop CPU cache; Series X allows its GPU to snoop CPU cache through hardware support but the inverse requires software solution.

Then again, I'm wondering if in fact that's not something PS5 has and therefore could be a reason they added the cache scrubbers to the GPU.



I know the Era user you are talking about, Lady Gaia, and I remember more or less what they were saying. And I did notice the SoC coherency fabric MCs in the graph but wasn't sure what to make of them (but it sounds like they are memory controllers as you say). However, I could've sworn MS listed their GDDR6 as 20-channel, not 16-channel.

Aside from that, I actually don't think what Lady Gaia (or you here for that matter) were saying is at play with MS's setup, because the "coherency" in SoC Coherency Fabric MC gives it away, at least IMHO. Coherency in the MCs would mean that consistency in data accesses, modifies/writes etc. between chips being handled through the two would be maintained by the system automatically, and not require shadow masking/copying of data between one pool (the fast pool) to the other (the slower pool), or vice-versa. Otherwise, if not for the coherency, that would probably be a requirement as we see on PCs (which fwiw are nUMA systems by and large rather than hUMA like the consoles will be).

There is probably still some very slight penalty in switching from the faster pool to the slower one, but I'm guessing this is only a few cycles lost. There was some stuff from a rather ridiculous blog I came across written back in March that tried insinuating a situation where Series X was pulling in less bandwidth than the PS4 in real-world situations due to interleaving the memory; quite surely no console designer would choose a solution with THAT massive of a downside for a next-gen system release, so it made it easy to write that idea off. Lady Gaia's take makes a bit more sense but even there I think they are overshooting the penalty cost.

Additionally, we should consider that games won't be spending even amounts of time between the faster and slower memory pools. That's the main reason I tend to write off anything trying to average out the bandwidth between the pools. Yeah, it's a neat metric to consider for theoretical discussion, but it makes no sense to present as a realistic use-case figure because you will have most games spending the vast majority of the time on GPU-bound operations. There are probably other things MS have implemented with the memory management between the two pools handled through API tools that haven't been disclosed (though I hope they disclose them at some point) that probably simplify things a lot for devs and take advantage of the fact the system is still by all accounts a hUMA design.

Yeah it is 20 channels, I believe (although could be wrong on what I am looking at )counted 10 channels on each MCs block unit, with what looked like pass-thru on both the inside and outside (left & right edges) with the blue stuff, presumably being infinity fabric (Scalable Data Fabric) bus connecting everything

But unless everyone else is looking at more info than me (I just looked at the OP's tom's hardware link and slides) that's where the term "coherency" might be getting misunderstood by me - or others - because I believe it is indicating that the chip is definitely 2017 Infinity Fabric tech, rather than incoming, Infinity Architecture technology, and so the "coherency" is about the CCX module coherency stuff like Cache Coherency Master, and CAKE (Coherency AMD Socket Externder) stuff shown over at wikichip

Infinity Fabric (IF) - AMD - WikiChip

Infinity Fabric (IF) is a proprietary system interconnect architecture that facilitates data and control transmission across all linked components. This architecture is utilized by AMD's recent microarchitectures for both CPU (i.e., Zen) and graphics (e.g., Vega), and any other additional...

en.wikichip.org

As for memory access, and the cost of accessing at 192bit (instead of 320bit), if you are saying all the disk IO is through the CPU - which I speculated in the next gen thread months ago - then surely streaming data (like the UE5 demo ) as REYES will mean that the CPU (IO decompressor) will be flat out with the 6GB pool, and to reduce GPU access cost being reduced to 192bit (also) will require that data moved to the 10GB, every few frames, no?

The diagram below that G GODbody linked, is that an official slide - as it looks official with corner logo?



The reason I ask, is because looking at the die-shot in the slides, I would be expecting something more like a 2 storey diagram interfacing the the two MCs blocks to the high & low chip address lines, with interleaved channels coming out of each MCs blocks alternating between high and low, visualising interleaved connectivity but with addressing that required asynchronous accesses - with the MCs translating/bit shifting/swizzling/etc when the GPU accesses the low memory, or when the CPU accesses the high memory.

 

[CrysisFreak]

It's helps to justify the purchase of the weaker console.

It's conveniently forgotten that both consoles will have cross-gen games, that only MS first party are mandated to support the Xbox One and that it's only for a couple of years, so will only impact a relative handful of games in reality.

Did I say forgotten? Sorry, I meant deliberately ignored for FUD purposes.

Yeah but who cares about 3rd party shit being cross-gen?
People want 1st party games to make full use of the new hardware, what 3rd party does is up to them.

 

[MrMiyagi]

Your point about the Jaguar cpu and HDD have been addressed multiple times in this thread already. It's nonsense.

As for the Series S, my understanding is that it's designed to play next-gen games just at lower framerates/resolutions. That's it. It still has a vastly improved GPU/CPU compared to current gen. It still has an SSD.

Nothing will be shackled by that. You need to let go of this narrative.

Parity is a thing and developers do have to design around it. So If MS launches two consoles - with such a gap in performance - surely one has to suffer over the other? People keep saying games will just run at bit lower resolution and framerate on Series S. But what if a developer doesn't want to target native 4k and 60fps? What if developers can get much better results out of these consoles by targeting 30fps and 1440p, for example?

Hell, just imagine how something like TLOU3 would compare to Gears 6 on Series S, if both games target the exact same resolution and framerate.

 

[DForce]

If you and your co-worker did the exact same job at the exact same skill and effort level and yet they were paid 18% more than you, would you consider that to be 'significant'?

What?

They're doing the exact same job and getting paid exactly the same. One can only do it with a little less strength.

 

[Godfavor]

Why MS does not use smartshift too? It's a standar rdna 2 feature. This will help squeeze a bit more gpu power by lowering the CPU clock in a GPU bound situation. This could effectively add 0.5 TF at least.

Maybe lowering the CPU does not give the required "fuel" to feed all these 52 CU's.

Even if it's a little more complicated by the developer. They can offer it as an option at least.

 

[Ascend]

Yeah it is 20 channels, I believe (although could be wrong on what I am looking at )counted 10 channels on each MCs block unit, with what looked like pass-thru on both the inside and outside (left & right edges) with the blue stuff, presumably being infinity fabric (Scalable Data Fabric) bus connecting everything

But unless everyone else is looking at more info than me (I just looked at the OP's tom's hardware link and slides) that's where the term "coherency" might be getting misunderstood by me - or others - because I believe it is indicating that the chip is definitely 2017 Infinity Fabric tech, rather than incoming, Infinity Architecture technology, and so the "coherency" is about the CCX module coherency stuff like Cache Coherency Master, and CAKE (Coherency AMD Socket Externder) stuff shown over at wikichip

Infinity Fabric (IF) - AMD - WikiChip

Infinity Fabric (IF) is a proprietary system interconnect architecture that facilitates data and control transmission across all linked components. This architecture is utilized by AMD's recent microarchitectures for both CPU (i.e., Zen) and graphics (e.g., Vega), and any other additional...

en.wikichip.org

As for memory access, and the cost of accessing at 192bit (instead of 320bit), if you are saying all the disk IO is through the CPU - which I speculated in the next gen thread months ago - then surely streaming data (like the UE5 demo ) as REYES will mean that the CPU (IO decompressor) will be flat out with the 6GB pool, and to reduce GPU access cost being reduced to 192bit (also) will require that data moved to the 10GB, every few frames, no?

The diagram below that G GODbody linked, is that an official slide - as it looks official with corner logo?



The reason I ask, is because looking at the die-shot in the slides, I would be expecting something more like a 2 storey diagram interfacing the the two MCs blocks to the high & low chip address lines, with interleaved channels coming out of each MCs blocks alternating between high and low, visualising interleaved connectivity but with addressing that required asynchronous accesses - with the MCs translating/bit shifting/swizzling/etc when the GPU accesses the low memory, or when the CPU accesses the high memory.

I have not seen this diagram before, but I saw a very similar one from an Xbox official on Twitter. So it's safe to say that this is accurate.

There is no "High" or "Low" chips. The chips that are marked yellow are not separate, and are part of the red. Each 'cilinder' in the image represent a memory chip, where the short ones that are only covered in red are 1GB chips, while the long ones that are covered in both red and yellow are 2GB chips. So for the GPU, you're using all 1GB chips and half of each 2GB chip, while the rest uses the other half that is left on each of the 2GB chips. I'm sure you don't have to use it like that, but that is likely the most efficient way if you want/need to use all the RAM available.

At this point it is still unclear how the memory controller works. And the disk I/O is not through the CPU. There's a separate I/O hub. But the lanes of the 2GB chips are shared between the GPU and CPU, and keep in mind that the GPU can also access the CPU pool, but vice versa is not possible apparently, at least not natively.

 

[PaintTinJr]

Ascend
I used the terms "high" and "low" because they are in the official slide that states "interleaving" memory.

 

[Ascend]

Ascend
I used the terms "high" and "low" because they are in the official slide that states "interleaving" memory.

Fair enough. It seems that no matter how much info is divulged about this console, there are still questions on how certain things work. Back when the specs were revealed I speculated about all the issues that this weird RAM config may have. If you're interested...;

Next-Gen PS5 & XSX |OT| Console tEch threaD

Ah...I thought this was talking about the same tech I've seen demos of that upscaled and corrected a video from say 1904 with all the grain and noise and makes it 4k. Seems to be how they're describing it in the articles though to be fair that may be just tech-nerd journalism at work then. If...

www.neogaf.com

 

[jimbojim]

Yes, but without smart-shift boosting the PS5 would be weaker. You're treating it like it's a feature when I suspect that Sony are, understandably, selling the positive features of what was really a necessity.

Without boosts the PS5 wouldn't by anywhere close to competitive in the hardware stakes.

The Series X doesn't have Smartshift because it simply doesn't need it.

Clocks in PS5 aren't boosted. If it is boosted, PS5 would be a 9 TF console, not 10. Of course XSX doesn't need Smartshift when it has a locked clocks. Ms designed XSX with locked clocks in mind. Go figure

 

[TheGreatWhiteShark]

I wonder if anyone on the XBOX team could tell us more about best tested case uses of their ML upscaling tech. I think it's going to be great for BC and am looking forward to that. I wonder if it will have some real cool DLSS type use cases.

While they did mention specifically "machine learning inference acceleration for resolution scaling on games" on hot chips,
for BC specifically I think what they have declared 6 months ago for the use of machine learning is also very exciting:

having all your BC catalogue enriched with ML HDR was promised, so it seems that is already done,
and they are working on ML doubling the framerates. if they manage to pull these off, I will really be very impressed.
for resolution itself, I think some ML infused into the already succesful Heutchy method will bring the goods.

edit:

Clocks in PS5 aren't boosted. If it is boosted, PS5 would be a 9 TF console, not 10. Of course XSX doesn't need Smartshift when it has a locked clocks. Ms designed XSX with locked clocks in mind. Go figure

oh come on now..! there's been enough defiance of logic in EVERY other thread. and it seems everybody is becoming dumber because of it.

anyway, wake up and smell the cerny flowers:

 

[geordiemp]

Yeah it is 20 channels, I believe (although could be wrong on what I am looking at )counted 10 channels on each MCs block unit, with what looked like pass-thru on both the inside and outside (left & right edges) with the blue stuff, presumably being infinity fabric (Scalable Data Fabric) bus connecting everything

But unless everyone else is looking at more info than me (I just looked at the OP's tom's hardware link and slides) that's where the term "coherency" might be getting misunderstood by me - or others - because I believe it is indicating that the chip is definitely 2017 Infinity Fabric tech, rather than incoming, Infinity Architecture technology, and so the "coherency" is about the CCX module coherency stuff like Cache Coherency Master, and CAKE (Coherency AMD Socket Externder) stuff shown over at wikichip

Infinity Fabric (IF) - AMD - WikiChip

Infinity Fabric (IF) is a proprietary system interconnect architecture that facilitates data and control transmission across all linked components. This architecture is utilized by AMD's recent microarchitectures for both CPU (i.e., Zen) and graphics (e.g., Vega), and any other additional...

en.wikichip.org

As for memory access, and the cost of accessing at 192bit (instead of 320bit), if you are saying all the disk IO is through the CPU - which I speculated in the next gen thread months ago - then surely streaming data (like the UE5 demo ) as REYES will mean that the CPU (IO decompressor) will be flat out with the 6GB pool, and to reduce GPU access cost being reduced to 192bit (also) will require that data moved to the 10GB, every few frames, no?

The diagram below that G GODbody linked, is that an official slide - as it looks official with corner logo?



The reason I ask, is because looking at the die-shot in the slides, I would be expecting something more like a 2 storey diagram interfacing the the two MCs blocks to the high & low chip address lines, with interleaved channels coming out of each MCs blocks alternating between high and low, visualising interleaved connectivity but with addressing that required asynchronous accesses - with the MCs translating/bit shifting/swizzling/etc when the GPU accesses the low memory, or when the CPU accesses the high memory.

The interface to memory as a signal is complex timing and thats why you can only strip similar accessed RAM unless anyone has found a solution to the phase differences in teh complex signals. I got some screengrab of how Nvidia do it, which is probably same for all GDDR6 and faster the memory chips get, the tighter a picoseconds the signals as its trying to do 4 at a time ?

 

[T-Cake]

I wonder what the point "Two independent virtualized command streams, different DX API levels" is all about?

 

[KingT731]

But it doesn't, we already know that's a lowball figure.

First of all bandwidth is a huge differentiator especially when it comes to rendering performance. It's the reason the Xbox One X was running games on average at resolutions 70-80% higher than the PlayStation 4 Pro while only having a 43% more capable GPU. With the PlayStation 5 and Series X we're again met with a large divergence in memory bandwidth afforded to the GPU.

[SNIP]

Don't forget 12GB RAM(around 9 useable for games) vs 8GB(around 5.5GB for games) on the PS4 Pro. That was a major factor.

 

[Jaguar Victory]

I wonder what the point "Two independent virtualized command streams, different DX API levels" is all about?

I think that refers to the OS / Game. Hypervisor if you will.

 

[jimbojim]

oh come on now..! there's been enough defiance of logic in EVERY other thread. and it seems everybody is becoming dumber because of it.

PS5 has capped clocks at 3.5 and 2.23. There is no boost in that if clocks are capped. Bc games will receive boost. Not next-gen games.

 

[jimbojim]

First of all bandwidth is a huge differentiator especially when it comes to rendering performance. It's the reason the Xbox One X was running games on average at resolutions 70-80% higher than the PlayStation 4 Pro while only having a 43% more capable GPU. With the PlayStation 5 and Series X we're again met with a large divergence in memory bandwidth afforded to the GPU.

Of course, more TF, bigger BW needed.
Bandwidth per TF is very similar on both. Mind you that XSX RAM speed will go down when games will use more than 10 GB.

 

[TheGreatWhiteShark]

PS5 has capped clocks at 3.5 and 2.23. There is no boost in that if clocks are capped. Bc games will receive boost. Not next-gen games.

yeah, right.
as I said already, its practically groundhog day with you guys. every day the same.

cerny himself said that it was impossible for ps5 to have a sustained gpu at 2.0Ghz, with cpu at 3.0Ghz
but somehow, some people now believe that now with boost mode, the clock will be way more than 2.0Ghz all of the time. 2.23 to be exact
oh, and with cpu at 3.5Ghz no less

here you go, we had this same conversation the day before, and I put up the exact words of chef cerny, bookmarked for your convenience:

Next-Gen PS5 & XSX |OT| Console tEch threaD

Covid is still having such a massive impact on distribution channels (I’m seeing this at work a lot). I'm seeing it alot as well. . Toilet Paper is starting to disappear again. And I can't get any ammo!!!!

www.neogaf.com

I dont need to repeat myself describing how stupid this entire thing is, and how it completely evades logic.
but hey, console warz!

 

[Nikana]

Every. Damn. Time

Fixed

 

[carloseduardocd]

These six 2GB RAM chips (1GB for CPU and other for GPU). When CPU needs data, it will be locked for GPU access data, right?

So, when CPU access all 6 chips at 336GB/s, GPU will access only 4 chips 1GB each, at 224GB/s right? It can change if GPU uses some of 6GB CPU memory.

In PS5, i guess it´s different, because if CPU uses 1 chip containing 2GB, it will be 56GB/s for CPU and the 7 other 2GB chips will be for GPU, 392GB/s.

So, it seems for me SeriesX has 560GB/s bus GPU, but not constant. And PS5 will have about 392GB/s bus GPU, but constant.

 

[Bogroll]

yeah, right.
as I said already, its practically groundhog day with you guys. every day the same.

cerny himself said that it was impossible for ps5 to have a sustained gpu at 2.0Ghz, with cpu at 3.0Ghz
but somehow, some people now believe that now with boost mode, the clock will be way more than 2.0Ghz all of the time. 2.23 to be exact
oh, and with cpu at 3.5Ghz no less

here you go, we had this same conversation the day before, and I put up the exact words of chef cerny, bookmarked for your convenience:

Next-Gen PS5 & XSX |OT| Console tEch threaD

Covid is still having such a massive impact on distribution channels (I’m seeing this at work a lot). I'm seeing it alot as well. . Toilet Paper is starting to disappear again. And I can't get any ammo!!!!

www.neogaf.com

I dont need to repeat myself describing how stupid this entire thing is, and how it completely evades logic.
but hey, console warz!

Wow that fell upon deaf ears. I wonder why.

 

[Tchu-Espresso]

If you and your co-worker did the exact same job at the exact same skill and effort level and yet they were paid 18% more than you, would you consider that to be 'significant'?

This is just a poor analogy.

 

[Allandor]

Of course, more TF, bigger BW needed.
Bandwidth per TF is very similar on both. Mind you that XSX RAM speed will go down when games will use more than 10 GB.

Not every operation needs that much bandwidth.
More bandwidth is more or less never bad, but more TF aren't, too. Even if you get into bandwidth problems, you can still use the available performance for other things that are not so bandwidth intensive (that worked on PS4, too).

Why MS does not use smartshift too? It's a standar rdna 2 feature. This will help squeeze a bit more gpu power by lowering the CPU clock in a GPU bound situation. This could effectively add 0.5 TF at least.

Maybe lowering the CPU does not give the required "fuel" to feed all these 52 CU's.

Even if it's a little more complicated by the developer. They can offer it as an option at least.

actually, they could use it, but they wanted fixed clockrates. Sony wanted to limit the chip by max power usage, ms wanted to fix the clocks so they must have a big enough PSU to support everything the APU is demanding from it. Therefor you could say that sony uses the given silicon in a more efficient way. Btw, you don't need smartshift for the variable clockrates, smartshift only delivers the "unused" power to the component that needs it. MS could also just increase clockspeeds depending on the gpu usage and the power-envelop for the GPU. The tech for that should be inside of the AMD chip but also with some side-effects. But why should they do that? It could make less chips capable of being usable for a console (lower the yields) and would make it more complicated for developers. And with their strange memory system, they already made the console more complicated for developers ... just to save costs. ... Well they should have just made the game-memory fast and only the OS part with a slower connection. This would have made it much simpler for developers to optimize for this. But well .. it is still much easier than optimizing for a small SRAM pool (like in xbox one).

These six 2GB RAM chips (1GB for CPU and other for GPU). When CPU needs data, it will be locked for GPU access data, right?

So, when CPU access all 6 chips at 336GB/s, GPU will access only 4 chips 1GB each, at 224GB/s right? It can change if GPU uses some of 6GB CPU memory.

In PS5, i guess it´s different, because if CPU uses 1 chip containing 2GB, it will be 56GB/s for CPU and the 7 other 2GB chips will be for GPU, 392GB/s.

So, it seems for me SeriesX has 560GB/s bus GPU, but not constant. And PS5 will have about 392GB/s bus GPU, but constant.

You can't just substract the max CPU bandwidth from the GPU bandwidth. The bandwidth is for both of them (but CPUs are often limited but they normally don't need that much bandwidth). It only get's complicated on xbox series x. If a component wants to access the 6gb pool it is limited to the bandwidth of those 6gb, if you want to access the 10GB pool, you are limited by the top speed. But as the OS uses the largest part of the 6GB pool, it should be really not happen often, that the speed is limited by the 6gb pool.

 

[DynamiteCop!]

Of course, more TF, bigger BW needed.
Bandwidth per TF is very similar on both. Mind you that XSX RAM speed will go down when games will use more than 10 GB.

That's not how it works.

 

[jimbojim]

yeah, right.
as I said already, its practically groundhog day with you guys. every day the same

Looks like you're trying to label PS5 as 9TF console in shadow. There is no boost clock in PS5. PS5 doesn't acting like PC GPUs where you overclock GPUs. Far from it. CPU and GPU are acting like "load balancers", not boosting clock to get more performance like in PC GPUs.

This Cerny said during Eurogamer interview :

It's really important to clarify the PlayStation 5's use of variable frequencies. It's called 'boost' but it should not be compared with similarly named technologies found in smartphones, or even PC components like CPUs and GPUs. There, peak performance is tied directly to thermal headroom, so in higher temperature environments, gaming frame-rates can be lower - sometimes a lot lower. This is entirely at odds with expectations from a console, where we expect all machines to deliver the exact same performance. To be abundantly clear from the outset, PlayStation 5 is not boosting clocks in this way. According to Sony, all PS5 consoles process the same workloads with the same performance level in any environment, no matter what the ambient temperature may be

It's called a "boost" ( you noticing simbol ") but it should not be compared with PC because it works differently. You got that now?

 

[jimbojim]

That's not how it works.

I think it does.

 

[psorcerer]

cerny himself said that it was impossible for ps5 to have a sustained gpu at 2.0Ghz, with cpu at 3.0Ghz

Oh fuck not this bullshit again.
It was impossible to produce a system that will be constantly clocked at 2.0GHz (in the given engineering constraints).

 

[carloseduardocd]

You can't just substract the max CPU bandwidth from the GPU bandwidth. The bandwidth is for both of them (but CPUs are often limited but they normally don't need that much bandwidth). It only get's complicated on xbox series x. If a component wants to access the 6gb pool it is limited to the bandwidth of those 6gb, if you want to access the 10GB pool, you are limited by the top speed. But as the OS uses the largest part of the 6GB pool, it should be really not happen often, that the speed is limited by the 6gb pool.

But i can´t access both SeriesX pools at the same time. That ´s my point. The only chips is "free access" is 4GB VRAM in 4 chips, 1GB each.

In PS5 i can access CPU and GPU data at the same time, because each 2GB chip has their independent 32bit access.

 

[GODbody]

Yeah it is 20 channels, I believe (although could be wrong on what I am looking at )counted 10 channels on each MCs block unit, with what looked like pass-thru on both the inside and outside (left & right edges) with the blue stuff, presumably being infinity fabric (Scalable Data Fabric) bus connecting everything

But unless everyone else is looking at more info than me (I just looked at the OP's tom's hardware link and slides) that's where the term "coherency" might be getting misunderstood by me - or others - because I believe it is indicating that the chip is definitely 2017 Infinity Fabric tech, rather than incoming, Infinity Architecture technology, and so the "coherency" is about the CCX module coherency stuff like Cache Coherency Master, and CAKE (Coherency AMD Socket Externder) stuff shown over at wikichip

Infinity Fabric (IF) - AMD - WikiChip

Infinity Fabric (IF) is a proprietary system interconnect architecture that facilitates data and control transmission across all linked components. This architecture is utilized by AMD's recent microarchitectures for both CPU (i.e., Zen) and graphics (e.g., Vega), and any other additional...

en.wikichip.org

As for memory access, and the cost of accessing at 192bit (instead of 320bit), if you are saying all the disk IO is through the CPU - which I speculated in the next gen thread months ago - then surely streaming data (like the UE5 demo ) as REYES will mean that the CPU (IO decompressor) will be flat out with the 6GB pool, and to reduce GPU access cost being reduced to 192bit (also) will require that data moved to the 10GB, every few frames, no?

The diagram below that G GODbody linked, is that an official slide - as it looks official with corner logo?



The reason I ask, is because looking at the die-shot in the slides, I would be expecting something more like a 2 storey diagram interfacing the the two MCs blocks to the high & low chip address lines, with interleaved channels coming out of each MCs blocks alternating between high and low, visualising interleaved connectivity but with addressing that required asynchronous accesses - with the MCs translating/bit shifting/swizzling/etc when the GPU accesses the low memory, or when the CPU accesses the high memory.

Yeah that diagram is not official, it was a mock up from reddit but it makes the Memory configuration fairly easy to understand.

Ascend
I used the terms "high" and "low" because they are in the official slide that states "interleaving" memory.

The term interleave is just refering to the spanning of data across chips.

In computing, interleaved memory is a design which compensates for the relatively slow speed of dynamic random-access memory (DRAM) or core memory, by spreading memory addresses evenly across memory banks. That way, contiguous memory reads and writes use each memory bank in turn, resulting in higher memory throughput due to reduced waiting for memory banks to become ready for the operations.

If you write data continuously to 1 chip you would only be able to read at the speed of 1 chip (56 GB/s) but if you interleave that data (I used the term span in my post) you can read from 10 chips ( 56 GB/s x 10 = 560 GB/s) at once or 6 chips at once ( 56 GB/s x 6 = 336 GB/s ). I don't think there would be a penalty per say as the same bus is still being used. The only limit is the amount of data that can be fit in to the 3.5 GB of standard memory. All the chips have the same speed still (56 GB/s).

So far, it looks like there's three speeds of address space for devs to play with, you have the 560 GB/s addresses in the GPU optimal memory, the 336 GB/s addresses in the Standard memory, and the 2.4 GB/s raw speed of the address space of the virtualized portion of the SSD ( with a theoretical 12 GB/s equivalent potential bandwidth with a combination of SFS and compression)

My impression of the structure of the SoC with the coherency and fabric is closer to HSA than just Infinity Fabric

HSA provides a pool of cache-coherent shared virtual memory that eliminates data transfers between components to reduce latency and boost performance. For instance, when a CPU completes a data processing task, the data may still require graphical processing. This requires the CPU to pass the data from its memory space to the GPU memory, after which the GPU then processes the data and returns it to the CPU. This complex process adds latency and incurs a performance penalty, but shared memory allows the GPU to access the same memory the CPU was utilizng, thus reducing and simplifying the software stack.

Cache coherency is a common tool employed in server environments to streamline operations, but HSA enables application of the technique anywhere one can find an SoC, including a broad range of devices in the client desktop, mobile, and tablet segments, among others.

 

[geordiemp]

yeah, right.
as I said already, its practically groundhog day with you guys. every day the same.

cerny himself said that it was impossible for ps5 to have a sustained gpu at 2.0Ghz, with cpu at 3.0Ghz
but somehow, some people now believe that now with boost mode, the clock will be way more than 2.0Ghz all of the time. 2.23 to be exact
oh, and with cpu at 3.5Ghz no less

here you go, we had this same conversation the day before, and I put up the exact words of chef cerny, bookmarked for your convenience:

Next-Gen PS5 & XSX |OT| Console tEch threaD

Covid is still having such a massive impact on distribution channels (I’m seeing this at work a lot). I'm seeing it alot as well. . Toilet Paper is starting to disappear again. And I can't get any ammo!!!!

www.neogaf.com

I dont need to repeat myself describing how stupid this entire thing is, and how it completely evades logic.
but hey, console warz!

Yes it is ground hog day, Cerny said they could not fix clocks at 3 Ghz CPU and 2 GHz GPU with complex instructions like AVX 256 or certain simple geometry in a fast loop (not normal game play frames) like a map screen and used HZD as an example. It implies stuff like map screens, non gameplay loops, stuff like FURMARK.

So normal game play of complex geometries with CPU then GPU rendering is not teh issue, he explaijned this and gave really easy to follow examples.

But the FUD is now fixed is not possible at 3 GHz GPU....Really ? No, its not possibel running AV6 256 or any code which heats up silicon on purpose. I doubt XSX can run AVX 256 constantly at 3.8 GHz, there will be some mitigation but whatever. Intel also downclock for AVX 256 on PC.

But you dont want to read that, you want to suggest POs5 cannot keep 2.23 and 2.5 GHz - see a developer comments below. But believe what you like, just try reading the whole paragraph and not 1 line.

Why cant yuou guys talk about XSX instead of constantly talking absolute rubbish about ps5,. You just cant help it can you.

 

[psorcerer]

I think it does.

It was even 2x more than that wasted in the last gen.
Dunno if it was solved/fixed for Zen 2 but GPU accesses are 64bit wide, while CPU is 32bit wide.
I.e. each CPU access on both consoles will waste 2x GPU bandwidth.